From d1addb107351273219c4637ba8557bda86902f69 Mon Sep 17 00:00:00 2001 From: Franck Cuny Date: Sun, 3 Apr 2022 17:51:04 -0700 Subject: content: update PCIe doc --- users/fcuny/notes/content/notes/stuff-about-pcie.org | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) (limited to 'users/fcuny/notes/content') diff --git a/users/fcuny/notes/content/notes/stuff-about-pcie.org b/users/fcuny/notes/content/notes/stuff-about-pcie.org index 4d1a825..eeb0b16 100644 --- a/users/fcuny/notes/content/notes/stuff-about-pcie.org +++ b/users/fcuny/notes/content/notes/stuff-about-pcie.org @@ -15,7 +15,10 @@ The most common versions are 3 and 4, while 5 is starting to be available with n | 5 | 128b/130b | 32.0GT/s | 3938 MB/s | 7.877 GB/s | 15.75 GB/s | 31.51 GB/s | 63.02 GB/s | | 6 | 128b/130 | 64.0 GT/s | 7877 MB/s | 15.754 GB/s | 31.51 GB/s | 63.02 GB/s | 126.03 GB/s | -This is a [[https://community.mellanox.com/s/article/understanding-pcie-configuration-for-maximum-performance][useful]] link to understand the formula: Maximum PCIe Bandwidth = *SPEED* * *WIDTH* * (1 - ENCODING) - 1Gb/s. +This is a [[https://community.mellanox.com/s/article/understanding-pcie-configuration-for-maximum-performance][useful]] link to understand the formula: +#+begin_quote +Maximum PCIe Bandwidth = *SPEED* * *WIDTH* * (1 - ENCODING) - 1Gb/s. +#+end_quote We remove 1Gb/s for protocol overhead and error corrections. The main difference between the generations besides the supported speed is the encoding overhead of the packet. For generations 1 and 2, each packet sent on the PCIe has 20% PCIe headers overhead. This was improved in generation 3, where the overhead was reduced to 1.5% (2/130) - see [[https://en.wikipedia.org/wiki/8b/10b_encoding][8b/10b encoding]] and [[https://en.wikipedia.org/wiki/64b/66b_encoding][128b/130b encoding]]. -- cgit 1.4.1